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ASIC Design Engineer

Apple
Posted 5 months ago, valid for a month
Location

Santa Clara, CA 95052, US

Salary

Competitive

Contract type

Full Time

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Sonic Summary

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  • Apple is seeking a dedicated engineer with over 10 years of experience in ASIC design to join their innovative team.
  • The ideal candidate should have expertise in architecture research and development of memory or highly interconnected system architectures.
  • A Bachelor's Degree is required, along with knowledge of high-performance memory subsystems, including DRAM controllers and PHY architecture.
  • The role involves driving new memory system architectures, exploring trade-offs in system performance, area, and power consumption.
  • Candidates will work collaboratively with the performance team to develop simulators, models, and test suites for high-performance parallel computer architectures.
Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Sophisticated, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. Join us to help deliver the next excellent Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our complex group, you will get the outstanding and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a dedicated engineer to join our exciting team of problem solvers.

Description


The ideal candidate will have experience in ASIC design with: - Architecture research and/or development of memory or highly interconnected system architectures. - RTL/micro-architecture. - Knowledge of high-performance memory subsystem, including dram controller, PHY architecture and design, DFI interface and dram interface calibration/training mechanisms and algorithms is a plus. - Systems experience in characterizing performance, doing comparison studies, and documenting and publishing results.

Minimum Qualifications


Bachelor's Degree with +10 Years of Experience

Preferred Qualifications


Drive new memory system architectures from DRAM up. Explore architecture and feature trade-offs in system performance, area, and power consumption. Develop memory hierarchies for high performance parallel computer architectures. (system-on-a-chip SOC). Work with performance team to develop performance/power simulators, models and test suites.


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